TSMC Nears 52-Week High After Citi Lifts Target 32%
TSMC shares traded near a 52-week high after Citi raised its price target 32% to NT$3,800, citing broader AI chip demand, rising wafer prices and higher packaging and capacity needs.
Taiwan Semiconductor Manufacturing Co. shares traded around NT$2,445–NT$2,465, close to a 52-week high of NT$2,535, after Citi Research raised its price target to NT$3,800 from NT$2,875 and kept a Buy rating ahead of the company’s July 16 earnings and analyst meeting.
Citi pointed to expanding demand for AI-related chips beyond graphics processors to include custom AI accelerators, cloud tensor processing units, networking silicon, optical interconnects and central processors. The brokerage said that broader demand supports use of TSMC’s leading-edge process technologies such as N2 and N3.
Citi expects wafer prices for those advanced nodes to rise into next year as demand strengthens. The firm added that higher selling prices could help offset margin pressure from heavier depreciation tied to large capital investments in new fabs and tools.
On capacity, Citi projected combined leading-edge node output could reach roughly 350,000 to 400,000 wafers per month by the end of 2028. Greater capacity at those nodes would support higher utilisation rates and give customers more visibility on supply timelines.
Advanced packaging is a growing focus as AI accelerators require close integration of processors with high-bandwidth memory and other components. Citi highlighted that packaging capacity is becoming nearly as important as wafer capacity for customers building complex AI systems, and that TSMC is expanding packaging lines alongside node production.
UBS raised its own price target for TSMC to NT$3,400 from NT$3,000 and increased its capital expenditure forecasts for 2026–2028, pointing to bigger investments in both advanced node production and packaging capacity.
Investors will watch TSMC’s July 16 quarterly report and analyst meeting for any updates to 2026 revenue growth forecasts, long-term targets, capital spending plans and timelines for scaling wafer and packaging capacity to meet rising orders from cloud providers and AI chip designers.








